1. Field of the Invention
Example embodiments relate to a semiconductor device and to a method of fabricating the same. More particularly, example embodiments relate to a phase change memory and to a method of fabricating the same.
2. Description of the Related Art
Electronic industries, e.g., a mobile communication industry, a computer industry, and so forth, may require semiconductor devices exhibiting, e.g., a relatively fast read/write operation speed, non-volatility, low operation voltage, and so forth. Semiconductor devices may include memory devices, e.g., static random access memory (SRAM) devices, dynamic random access memory (DRAM) devices, flash memory devices, phase random access memory (PRAM) devices, and so forth.
A PRAM may satisfy the above characteristics required in a semiconductor device. For example, since the PRAM may be capable of performing information changes of more than about 1013, its durability may be excellent. Additionally, the PRAM may have a high operation speed of about 30 ns.
A conventional PRAM may include a phase change layer that changes its crystal state, i.e., amorphous or crystallized, with respect to heat, e.g., heating temperature and/or time. For example, as illustrated by curve 1 of FIG. 1, when the phase change layer of the PRAM is heated at a temperature higher than a melting temperature (Tm) for a first duration T1, followed by cooling, the phase change layer may become amorphous. In another example, as illustrated by curve 2 of FIG. 1, when the phase change layer of the PRAM is heated at a temperature lower than Tm and higher than a crystallization temperature Tc for a second duration T2 longer than the first duration T1, followed by cooling, the phase change layer may be crystallized. The crystal state of the phase change layer may affect an electrical resistance thereof, e.g., a crystallized phase change layer may have a resistance of about several KΩ and an amorphous phase change layer may have a resistance of about hundreds KΩ, so information stored in a memory cell of the PRAM may be read by sensing a change of electrical resistance of the phase change layer.
Since electrical resistance of the phase change layer is important for controlling operation of the PRAM, stable control of physical properties of the phase change layer may be required during manufacturing of the PRAM, e.g., control of process temperature or impurity diffusion. For example, a manufacturing method of a conventional PRAM may include forming a capping layer on the phase change layer in order to prevent impurity, e.g., oxygen, diffusion into the phase change layer.
The conventional capping layer of the PRAM may be formed at a temperature lower than a transition temperature of the phase change layer to avoid affecting electrical properties of the phase change layer. For example, the conventional capping layer may be formed by a physical vapor deposition (PVD) method. However, a layer formed via a PVD method may exhibit, e.g., reduced step coverage, poor density, and lower quality, as compared to layers formed via other deposition methods. As a result, a conventional capping layer of a PRAM formed via a PVD method may have non-uniform thickness, e.g., upper portions of the capping layer may be thicker than lower portions of the capping layer, thereby limiting thickness of the capping layer and reducing integration degree of the PRAM.